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Their values are computed each time for every rule and are based on the target and prerequisite file names. There are some special variables called automatic variables. So you can freely use any environment variable. When make is run, it also converts all available environment variables into make variables. Similarly, you can run make TARGET=newcount.txt clean to clean this new file. Passing TARGET=newcount.txt overrides the default value of $(TARGET) in the Makefile and so, instead of count.txt, the file newcount.txt is generated. However, if you want to change the name of the target to, for example, newcount.txt, you can do so without changing the Makefile: make TARGET=newcount.txt If you run the make command, it should work just like before. Here instead of hard-coding the target and source file names, we have used two variables, with default values of count.txt and data.txt. TARGET = count.txt SOURCE = data.txt all: $( TARGET ) $(TARGET): $( SOURCE ) wc -c $( SOURCE ) > $( TARGET ) # Count characters wc -w $( SOURCE ) > $( TARGET ) # Count words wc -l $( SOURCE ) > $( TARGET ) # Count lines clean: rm $( TARGET ) It is a recommended practice to have a clean rule to delete any generated files, effectively returning the project to the initial state. Let’s add a rule to clean the project files.
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Running make count.txt will run only the count.txt rule. You can also run a target directly by passing its name to the make command. Since the dependency was changed, it rebuilt the target. Now when you run make, it runs the commands and updates count.txt. The next time you run make following the same sequence, make looks at count.txt and notices that count.txt is newer than data.txt, meaning the dependency has not been changed since the last time make was run, so it doesn’t do anything.Įdit the data.txt file and change the text to hi world. The target count.txt depends on data.txt, so the commands are run and the file is generated. Since all depends on count.txt, that target is executed. When you run make without any argument, it runs the first target, which is all in this case. If you run the make command again, you should see the output: make: Nothing to be done for 'all'. You should see that make executes the commands listed and creates count.txt.
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The target count.txt depends on the file data.txt and the recipes list contains the commands you ran previously. This means that all will be prepared as soon as count.txt is prepared. The all target depends on count.txt and has no recipe. It is not necessary to have such a target, especially when our build has only one step, but it is a recommended practice. The first target is all, which acts like an overall build target. Let’s write the Makefile to automate this:Īll: count.txt count.txt: data.txt wc -c data.txt > count.txt # Count characters wc -w data.txt > count.txt # Count words wc -l data.txt > count.txt # Count lines This should create a file named count.txt with the following content: 13 data.txt wc -c data.txt > count.txt # Count characters In this simple demonstration, you have a dependency and a target that needs to be built from the dependency.įirst, let’s do it manually. You’ll use the wc command to calculate the number of characters, words, and lines and store it in a file named count.txt. Create a file named data.txt with the text hello world. If, however, any prerequisite is newer than the target, the recipes are executed. If all the prerequisites are older than the target file, it means that none of them has changed since the last time the rule was executed. When make executes a rule, it looks at the prerequisites. The recipes are shell commands that need to be run in order to generate the target. The prerequisites can be the name of an existing rule, or the name of a file in the same directory. The target is the file you want to be created in that rule. Each rule must have one or more targets, zero or more prerequisites, and zero or more recipes.